Timing of various components of a computer system is synchronized by clock signals generated by oscillator circuits. For instance, conventional mother boards of personal computers include a real time clock (RTC) and a crystal oscillator circuit to provide the main clock for mother board components such as input/output (I/O) controllers. Clock signals are also essential in numerous other electronic systems and devices that process digital signals. Radio communication systems and devices use oscillator circuits as an indispensible part of their modulation and demodulation circuitries to generate sinusoidal signals. In some applications, high-accuracy, high-speed clock signals are required. For example, network devices need to maintain high-accuracy timers even when operating in a low power mode. However, generating high-accuracy oscillators that generate high-speed clock signals can consume significant amounts of power.
Many oscillator circuits generating oscillations with precise frequencies use a crystal as an oscillator core to govern their resonating signals. In order to sustain oscillations of a crystal oscillator, a gain element such as a transistor can be used to amplify the resonating signal and feed it back to the oscillator core. For example, the conventional crystal oscillator 100 of FIG. 1 uses a transistor M1 as the gain element. The core of oscillator 100 is a crystal 110 connected in parallel with a resistor 120. A current source 130, connected between a power supply Vcc and a drain of the transistor M1 at an output node 140, provides a bias current for the transistor M1. The resistor 120, connected between a gate of the transistor M1 and an output node 140 of the conventional crystal oscillator 100, provides a negative feedback between the drain and the gate of the transistor M1, which in turn ensures a stable DC operating point of the conventional crystal oscillator 100. A circuit 150 may use a clock signal CLK generated at the output node 140, for instance, to synchronize timing of its various components.
The current source 130 of the conventional crystal oscillator 100 is always ON and there is no provision for lowering a power level of the crystal oscillator 100 for time periods that the circuit 150 is fully or partially in an inactive (e.g., sleep) mode. Consequently, the conventional crystal oscillator 100 may be impractical in applications for which lower power consumption is increasingly important.
Current attempts to address this problem typically involve switching to a separate low power oscillator (LPO) to generate clock signals during a low power mode of operation. For instance, a circuit 200 of FIG. 2 illustrates a conventional solution that includes a main oscillator 210, an LPO 220, and a multiplexer (MUX) 230. The MUX 230 selectively connects either the main oscillator 210 or the LPO 220 to a circuit CKT 240 in response to the select signal SEL. For example, during a normal mode, the select signal SEL is driven to a first state that allows the main oscillator 210 to provide clock signals to the circuit CKT 240, and during a low power mode, the select signal SEL is driven to a second state that allows the LPO 220 to provide clock signals to the circuit CKT 240.
The problem with this solution is that it uses a separate LPO during the low power mode, which undesirably increases circuit size and complexity. In addition, LPOs are not designed to generate high-accuracy and/or high-speed clock signals, as is typically required for many applications such as real time clocks or network devices. Thus, there is a need for a novel architecture of an oscillator circuit that can provide a low power mode of operation without the disadvantages of the circuit 200.
Like reference numerals refer to corresponding parts throughout the drawing figures.